Silicom offers FEC acceleration (code name - Pomona Lake) for L1 offload that includes all hardware elements for simple deployment and integration by software companies. L1 Acceleration: eASIC and FPGA offer offload and acceleration aim to improve the CAPEX and OPEX of the X86 platform. On top of that, both eASIC and FPGA can deliver a higher number of connected RU with full bandwidth support.